TIMA tima.imag.fr ) is developing a new environment for targeting hierarchical multitask specifications onto multiprocessor hardware/software architectures. Typical target applications are multimedia and telecom systems on chip. These generally require several processors (DSPs and microcontrollers) in order to meet required performance.
The system specification is given in C/C++ enhanced with a concurrency structure. The project includes several refinement steps aimed to transform the code of the tasks and the interaction between these tasks. TIMA is using CoSy as a software platform for these transformations.
"One of CoSy's greatest strengths is ACE's continuing interaction with its industrial customers," said Ahmed Jerraya, professor at TIMA. "ACE works closely with industry leaders to constantly improve the CoSy development platform. This tight relationship has helped CoSy to become the ultimate in compiler generation."
IRISA www.irisa.fr ) is a public research laboratory associated with INRIA, CNRS, INSA and the University of Rennes, France. Its CAPS team, has over ten years of experience in microprocessor architecture, instruction level parallelism (ILP), code optimization and compilers. The CAPS team works on efficient techniques to fully exploit the potential of processors.
IRISA is using CoSy for research in code optimization for VLIW high performance multimedia processors. In particular, they are working on instruction scheduling issues, including preprocessing for multimedia instructions. More advanced topics include technique exploration for dealing with tradeoffs such as code size versus performance.