The art of semiconducting using silicon, DNA, quantum devices, and photonsMannheim 08 jun 2000 Dr. Gene M. Amdahl kicked off the Supercomputer 2000 Conference, offering a survey of the innovative approaches to achieve a high speed signal transmission in computers. For over five decades, semiconductors have reigned the field of informatics with popular circuit families, known as Complementary Metal Oxide Silicon (CMOS) and Emitter Coupled Logic (ECL). Since both circuits have their drawbacks, new ways have been sought either to enhance the performance of existing techniques, or to introduce advanced technologies to replace silicon with compound materials for logic signal transmission. Today however, the future of magically sounding alternatives such as DNA, quantum devices, and photons still remains unsure.
Dr. Amdahl cited CMOS as the currently preferred circuit family with a field effect device as the fundamental transistor. CMOS very much resembles the functioning of its predecessor, the vacuum tube. The great advantage is that the two existing types of devices, namely p and n, can be produced with equal switching speeds. In the past, the p-types were faster because the current was carried by electrons instead of by holes, like in the n-types. Now, a circuit family can be developed in which p-type and n-type devices are connected in series between the power supply polarities. The conductivities are controlled by having their contol electrodes connected together. Since no current is flowing except for the switching process itself, the CMOS circuit is charaterised by a low power consumption.
In turn, Dr. Amdahl described the ECL circuits as the fastest technology in silicon. Yet, this method shows two important drawbacks. The speed of the constant current switch transmission requires a high and very costly power distribution and heat removal procedure. In addition, the ECL approach limits the circuit densities because of the expanded area of the transistor on the chip. Hitachi found a temporary solution in the use of hybrid circuit families of CMOS and ECL whereas IBM applied germanium doped silicon and planar geometry to solve the problem. The need for power still was high so more research was directed to the field effect devices.
The smaller size the field devices have, the faster switching speeds they develop. As Dr. Amdahl explained four times as many gates, each at twice the speed, can be installed on the chip with unchanged power and cooling requirements. Once the resolution or feature size was reduced to 0.5 microns, CMOS was able to substitute ECL. Currently, the resolution has come down to 0.18 microns thanks to the fluorination of silicon dioxide and silicon nitride, and by transforming the conductors to copper from aluminium and tungsten, as well as changing the light sources to ultra-violet, allowing to achieve shorter wavelengths.
Dr. Amdahl anticipates that resolution will progress according to Moore's law. Yet, the rate of improvement will tend to slow down in the decade to come. Therefore, research is concentrated on how to optimise performance, rather than enhance resolution, and on exploring novel technologies to replace silicon CMOS. In 18 months from now on, the resolution will evolve to 0.12 microns by using a deeper ultraviolet laser to expose the wafer. Other methods consist in scattering electrons to block them from printing, enabling only unscattered electrons to impinge the photo resist. This is being tested in the Bell Laboratories.
Sandia, Lawrence Livermore and Lawrence Berkeley U.S. National Laboratories on their side are experimenting with laser vaporisation to generate a plasma radiating at all wavelengths. Lucent researchers in the meanwhile produced a transistor with a gate length of 36 nanometers, including an oxide layer of some four atoms thick. This wil result in 64- or 256 gigabit memory chips and a 10 gigahertz processor clock by 2010. As for the performance enhancement by 20% to 30%, IBM is working on oxygen implantation in the silicon wafer, a technique which is called Silicon on Insulator (SOI). Another IBM alternative constitutes the building of a chip with a layer of memory cells incrusted with a layer of silicon, patterned with logic.
A third IBM solution, according to Dr. Amdahl is the variable clocking capability to select the proper clock whenever the logic decision is formed. Chip cooling also improves the performance up to five times room temperature operation by changing the doping and the geometry of the devices. To this purpose, chillers with Helium gas have been developed. From the moment, both the resolution and performance improvement capacities have been exhausted, new technologies will have to replace the old ones. In this regard, DNA might solve the so-called travelling salesman problem, as IBM already demonstrated, but Dr. Amdahl has strong doubts about the DNA potential to cope with larger series of problems.
Quantum devices form an alternative but unfortunately, they bring about severe design and production complications. Atoms are removed from two nearly adjacent lattice positions to trap an electron in one of both vacancies and to nudge it by a modest electric field into the nearly adjacent vacancy. A string of 120 to 363 of such devices can offer the equivalent of interconnect conductors. This great number is necessary since the trapped electron constitutes a wave function with its fringe considerably large in the adjacent vacancy. How to reproduce such a complex pattern of crystal lattice vacancies still remains problematic, as well as the replication issue.
The third technology presented by Dr. Amdahl will try to introduce the use of photons for logic signal transmission, switching light to alternative paths. Also here, the question arises whether this technique will be suitable for generalised computing. As far as feature size is concerned, silicon-based systems still tend to be superior. Interconnect transmission times however are shortened in the optical system. Only the future will tell which solution will provide the best results.
Leslie Versweyveld |
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