PixelFusion designs most complex general-purpose chip design to dateBristol 15 Mar 00"PixelFusion's FUZION 150 is representative of the dramatic evolution of DSM chip design to a point where incredible demands are being placed on existing verification tools," said Jue-Hsien Chern, Vice President and General Manager, Mentor Graphics Deep Submicron Division. "Mentor's focus on key DSM verification technologies such as high-performance circuit simulation, Verilog simulation and design rule checking, clearly places us at the center of what will become a multi-million dollar market." Key to PixelFusion's ability to design and verify timing lies in the use of Mach TA to perform detailed transistor-level circuit simulation on the FUZION 150 design. Verilog vectors from ModelSim were re-used by Mach TA to verify the timing of DRAM and logic blocks. Mach TA was also used to design and tune several phase lock loops (PLLs). "It was critical that we achieved SPICE-like accuracy while still meeting our time-to-market demands," said Russell David, Director of Hardware at PixelFusion. "Mach TA not only delivered on its promises of speed and accuracy, it exceeded our expectations for a high-capacity circuit simulator." PixelFusion's FUZION 150 is a 0.25 micron, single-chip, massively parallel SIMD (Single Instruction Multiple Data) processor with 24 megabits of on-chip embedded DRAM. This ultra high-performance chip delivers more than 1.5 trillion operations or 3 billion floating-point operations per second, along with 600 gigabytes per second of on-chip memory bandwidth. As a programmable, general-purpose computing device, the FUZION 150 offers maximum performance, features and flexibility to markets ranging from graphics and video to network processing. PixelFusion's breakthrough FUZION architecture is bringing supercomputer-like performance to today's high-end computing.
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