Virtuoso 4.2 IDE with as multiprocessor DSP support and multitasking network host server

"Eonic has developed its Virtuoso IDE with RTOS specifically to handle the heavy interrupt and data processing demands of DSP applications and to exploit as fully as possible the DSP architecture - particularly in applications with multiple processors. The Virtuoso RTOS also exploits the parallelism inherent in DSP architectures to achieve maximum hard real-time performance in the smallest possible amount of code.

Multithreaded, Asynchronous Network Server - Embedded networks such as industrial control systems, high speed inspections systems, radar and sonar frequently require a graphical interface to an operator. Although virtually all RTOSs offer some support for multiple processors, there has been no integrated solution that supports multitasking on the network host side. As a result only one application task may access the outside world at any time. For example, data may not be transferred from a TCP/IP or Ethernet network to the host at the same time that the keyboard is being used. The penalty for this situation is that data transfer rates between the systems processors and the network host server are severely restricted - usually to no more than a few hundred kilobytes per second.

Virtuoso 4.2 is the first RTOS ever to implement asynchronous multitasking on the network server. Virtuoso uses a communicating sequential process (CSP) multitasking model that allows direct communication between any target task and any network host server-based application. One side of the communication can be a Virtuoso target task that communicates using a channel, while the other side of the communication can be a host-based application that communicates using a file, a named pipe, a COM port or a TCP/IP socket. Network host server multitasking speeds up data transfers by several orders of magnitude. Virtuoso 4.2 has achieved data transfer rates between the network host server and application processors of 16 megabytes per second (MB/s) -- over 50 times faster than using a conventional, non-multitasking host/target communications protocol.

RTOS Achieves 100% Scalability By Combining CSP and Multithreading - Most real-time operating systems, such as pSOS, VxWorks and Windows implement multitasking using threads. Each task has its own thread and all threads that must communicate with each other must share the same memory space. The threads are synchronized using semaphores (to signal when data is ready) and mutexes (to lock and unlock resources which are in use). In single processor systems that do not require "hard" real-time operation, multithreading can be very fast and efficient. However, as processors are added to the system, memory accesses by multiple processors creates a bottleneck on the bus that degrades performance. In a system with a 200 MHz processor, the addition of even a second processor may actually reduce overall system performance. Shared memory has another drawback in that the engineer must individually design sub-applications and manage the memory for each processor in the system. In short, a separate program must be written for each of the system processors. These systems are not easily scalable to more or fewer processors. Moving tasks between processors or to a new processor is extremely difficult and can result in erroneous pointers, premature overwriting of data, or memory fragmentation. Taking advantage of a new DSP architecture that can do the same job with fewer processors requires the designer to rewrite the application from scratch. Thus, even though the application is implemented almost entirely in software, it is still not very re-usable if the hardware changes.

Virtuoso 4.2 solves the multiprocessor bottleneck and the scalability problem by combining the communicating sequential processor (CSP) multitasking model and the multithreading model in the same RTOS. In the CSP model. tasks (similar to threads) communicate directly through channels that serve as data-flow pipes. The channels exploit the multiple external buses or the direct link ports available on DSPs, so the DSPs communicate directly with each other without using the system bus.

CSP Target Channels Eliminate the Need for Data Buffers - In Virtuoso 4.2 all processors have access to each other's memory (distributed memory) and each task has its own dedicated memory space. Virtuoso 4.2 also offers "pooled" memory, a variant of distributed memory that treats all system memory as a huge single block of memory, thereby preventing fragmentation and optimizing memory usage.