NEC User Group gets Statutes, previews Intel Itanium and Petaflop/s TechnologiesFrascati 25 May 2001 The NEC User Group held its 13th meeting in an elegant 18th century Villa on a hill outside Frascati some 20 Kilometres from Rome, Italy. This eclectic group, of around 75 people from four continents, had a great time listening to keynotes describing the latest in Meteorology, Aerospace, the new Itanium Chip Architecture from Intel, and the latest research on technologies expected from NEC in the next ten to fifteen years. They formally set up NUG as an independent society under Swiss law. They also elected the NUG officers, with Dr. D. Maric, from CSCS, Switzerland as Chairman. Below are some of the highlights from this event.
The NEC User Group held its 13th meeting in an elegant 18th century Villa on a hill outside Frascati some 20 Kilometres from Rome, Italy. Villa Tuscolana is not only elegant inside, but has stunning panoramic views blending perfectly with the state-of-the-art visionary preoccupation's of both keynote speakers and participants. The attendees were of course mostly NEC customers, using shared memory parallel vector supercomputers.
This eclectic group, of around 75 people from four continents, had a great time listening to keynotes describing the latest in Meteorology, Aerospace, the new Itanium Chip Architecture from Intel, and the latest research on technologies expected from NEC in the next ten to fifteen years. (Only USA supercomputer users were conspicuous by their absence, but this should be remedied next year, since the anti-dumping law against Japanese supercomputer companies was repealed on May 3rd allowing Cray to sell NEC SX systems there). In addition to presentations and the ancient historical Roman backdrop, the conference was complemented with a great night life and many gastronomic delights.
The first day focused on the formalities of setting up NUG as an independent society under Swiss law. They also elected the NUG officers, with Dr. D. Maric, from CSCS, Switzerland as Chairman. Incidentally, for those who haven't heard, Professor Michelle Parinello and his strong research team on bioinformatics are moving to CSCS this July, when he would take his post there as Scientific Director.
The statutes of the NUG society declare that it is an open, user-oriented, non-profit organisation, with the lofty aim to create added value attractive to specialist supercomputer end-users and their organisations. This is to be done by focusing on leading edge high performance supercomputing solutions.
In order to facilitate in-depth information exchanges from expert to expert a series of specialist groups were set up including one on meteorology. These are backed by a web site permitting the exchange of sensitive/internal information for members through a registered user login mechanism. NEC users interested to join NUG should contact NUG secretary Ms E. Tanzi on email: etanzi@nec.ch
To show that they are serious, their next meeting is in a year's time in Japan, taking in, the by then newly operational Earth Simulator, seeing first hand this Teraflop/s frontiers civilian supercomputing programme.
As the Italians say: "Non attendere il miracolo - spianagli la strata". And if your Italian is rusty, it translates to: "Don't wait for a miracle - pave the way for it".
The keynote speakers did indeed pave the way with titles such as: "Device Technology for Petaflop/s Computing", "Climate Modelling Research", "Towards Complete CFD Simulation", the Intel Itanium Architecture and many more, looking at technology challenges for the next ten years, in storage and networking as well as "The Road to a Virtual Enterprise in Aerospace" and other applications in many scientific engineering fields. A preview of next months TOP500 by Professor Hans Meuer, was also on the programme.
These presentations were given by top notch speakers with many years practical experience in supercomputing. Some of them are Directors of supercomputing facilities and have significant influence on supercomputing directions due to their institution's purchasing power.
It will not do justice trying to describe all the presentations in detail, so I shall restrain myself in briefly saying something about one of them. A selection of other presentations would be dealt in separate articles, so watch this space.
By the time you read this, Intel would have announced the IA-64 Itanium chip set. There are already some 35,000 of these chips available to the computer industry, which is preparing systems using Itanium Chips. Some users are Beta Testing these products at their sites, so there is a lot of knowledge about the capabilities of this Chip and its successors currently known as McKinley and Madison. In brief the Itanium Chip uses the IA-64 Architecture developed jointly by HP and Intel with significant inputs from other computer vendors. Intel is positioning the Chip set to deliver commodity blocks for HPC. The Initial Chips run at 733MHz and 800 MHz clock rate. They are designed with a flexible Explicitly Parallel Instruction Architecture, (EPIC) using explicit parallelism, instruction prediction and speculation, as well as many (128) separate registers for f.p. and integer arithmetic, three levels of cache memory, and although it has no vector pipe it can be viewed and handled like a vector machine from the viewpoint of the application programmer. This allows up to 20 operations per clock, and 3.2 Gflop/s peak performance in 64bit floating point arithmetic.
The Intel Itanium project in context.Intel manufactures the chip set and the computer industry uses it to design their systems. There are 30 plus systems under development at present including the NEC AzusA commercial business machine and a Linux variant especially targeted at the scientific and engineering market.. In the software area, Windows, Linux and several other operating systems are implemented. For Parallel API, OpenMP and MPI and the usual languages associated with scientific and engineering programming, such as Fortran and C, C++ are being Beta Tested. Intel invested some US$7.5 Billion in the Itanium and is hopeful that Gordon Moore's Law of doubling performance every 18 months is safe for the next 10 years. Of course high end supercomputing is more than a chip, it also involves memory bandwidth and tight system integration to deliver high optimisation efficiencies of the order of 70% and more for large applications. As far as I can see, no systems in this league are likely to be using the Intel Itanium chip set, as yet. Reflections from 40 years experience in supercomputing practiceThe conference closed with an excellent dinner, and a keynote presentation by Dr. Wouter Loeve, who just retired from the Dutch National Aerospace Laboratory NLR where he was leader of the ICT division responsible for aerospace research. His reminiscences covered over 40 years at NLR, and as befits the occasion as an NUG guest, he described how he and his engineering colleagues defied conventional wisdom, in 1986, and bought an NEC SX2, (the first outside Japan) instead of a Cray machine. He went on to recall that although it was a bit of a cultural shock, it was nevetheless refreshing, the Japanese practice of under selling their products, instead of hyping them. He proudly associated himself with the decision to switch to Japanese supercomputing systems, and considers it one of the high points in NLR's successful aerospace research history.
Chris Lazou |
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