Jerry Huck is CTO of Itanium based servers at HP, involved in building Intanium systems for years. The Itianum architecture is in fact a joint development with Intel. HP brought its knowledge based on PA-RISC development into the project.

The Itanium chipset is designed to serve as many applications as possible. HPC is just one of them. There are a few extensions in the chipset to make life easier for HPC. But economics require that there cannot be one chip designed for HPC. This would be too expensive. Hence there is a price-performance trade-off, that has to be taken into account.

A lot of design today is going into making systems ready for the adaptive enterprise, said Huck. Create a flexible design so that one can run Windows and Linux easily on the same system. Together with a number of other large vendors, a group is formed that defines a small firmware interface to allow for this. Because it is only a very small interface, it basically provides flexibility at virtually no cost.

There are not any wild architectural designs these days. The innovation is more in the software, as for instance Grid software. The challenge for the hardware designers it to provide efficient support. But Huck pointed out that internally in the chips there is a lot of innovation. That is needed to keep up with the performance doubling that people expect from Moore's Law. Hardware designers have kept up with this difficult task for so many years, people would be dissapointed if they do not. But the march from the micron to the submicron level requires a lot of innovative efforts.

The transition from RISC to Itanium is, from an architectural point of view, mainly the application of sophisticated instruction level parallelism. Together with more on chip storage facilities, such as large register files and large caches, this provides the possibility to do, for instance even basic image processing on-chip.

On top of this low level parallelism, there are levels of SMP and cluster parallelism. The higher levels releave the pressure on chip designers to do even more on the low level.

The Itianium is both used by former RISC users, for HP, mainly PA-RISC users, and users outgrowing 32-bit applications. Itanium can run 32-bit programmes, and it is very efficient at doing that. But it allows time to port applications to full 64-bit.