|
Mr. Rattner offered the ISC 2003 audience a brief overview of some milestones in the HPC history and stated that HPC is now moving towards industry standards and building blocks for volume economics. He also observed a growing popularity in cluster computing, a trend which is mirrored in the TOP500 list.
As for the processor architectures at Intel, Mr. Rattner cited the NetBurst micro-architecture, the hyper-threading and the EPIC technologies. The next-generation IA-32 desktop processor is called Prescott and Madison is the next-generation Itanium architecture processor. The speaker thought blade clusters to be the next wave since they allow to have TFLOPS in just one rack. He also mentioned Infiniband as the only 10Gb/sec data centre solution.
At Intel, researchers are currently working on a scalable cluster file system, known as the Lustre project. Mr. Rattner told the audience that the general trend for storage is to move it out of the box. Therefore, fast processors need lots of disks to keep them busy, and a large number of disks just won't fit in the box. The solution has to be found in a scalable network-storage system which is built from commodity components and that looks to its users as a single big system. The Lustre conceptual topology comes down to elements which allow for scalable shared storage.
The goal of the Lustre project in fact is to develop a scalable object-based file system with cluster-wide POSIX semantics for Linux, lining up to 10,000 clients. There is a strong Linux team involved with ext3 file system experience and Intel in turn contributes to the instrumentation and performance analysis, as well as the storage targets. The U.S. National Laboratories - Livermore, Los Alamos and Sandia - will grant the project an R&D funding of three years and will provide their large clusters to support Lustre.
There is also a Gigabit TCP/IP project running, code-named Xtreme, to deal with the Gigabit TCP/IP challenge. Mr. Rattner is convinced that Moore's law does not suffice. The Xtreme architectural approach is to build an experimental programmable hardware engine for off-loading TCP processing. The focus will be put on the most complex part which is the TCP input processing. The engine has to be able to handle 10Gbps Ethernet traffic with sufficient headroom for output processing. Mr. Rattner talked about an aggressive wire speed goal, meaning a minimum packet size on saturated wire. The Xtreme engineers strive to develop a simple, scalable and flexible design that enables a fast time to market.
For a detailed insight in Mr. Rattner's opinions about the current evolutions in supercomputing, Grid computing and bandwidth issues, Primeur is referring to the interview it recently had with Mr. Rattner:
|
