News from Fujitsu Siemens Computers' Linux Cluster hpcLine

Munich 10 December 2002 Eric Schnepf, Fujitsu Siemens Computers (FSC), described the history and the future of the Linux-based IA-32 Intel and AMD cluster. End of December, FSC has delivered orders of 100 clusters with about 3000 processors. Interesting is the distribution in application areas and users. About 70% of the systems and processors are running in industry, the other 30% are installed in academia and research. Further on, Eric Schnepf discussed the hpcLine roadmap.

From Scientific Collaboration towards Industrial Product

In 1998, FSC installed a test cluster consisting of CELSIUS workstations with an SCI system area network at PC2 (Paderborn Centre of Parallel Computing) in Paderborn. In December 1998, a big hpcLine system with 192 CPUs started the operation in Paderborn. Officially, the hpcLine concept was announced in February 1999. The first industrial customer was DaimlerChrysler in December 1999 with an electromagnetic compatibility application. This will be replaced soon by a bigger hpcLine, instead of 32 processors, now 72 CPUs Intel Xeon 2.4 GHz will be delivered. In 2001, these Linux clusters received general acceptance in automotive and process industry.

Distribution of hpcLine

As mentioned earlier, FSC installed about 100 clusters with 3000 CPUs, status at end of December 2002. The research and academic users ordered about 30% in systems and CPUs, the other 70% has been delivered into industry. The automotive industry uses 18 hpcLine systems, the automotive suppliers, 11 different companies, run 15 systems. Thus the automotive industry sums up to nearly 50% of all industrial usage.

In the meantime, hpcLine has crossed the German border, installations in Austria, Italy, Belgium, Luxembourg, Switzerland, and 6 machines in France. Thus the SAVE working group discussed plans to meet next time in Paris. There are for example two machines at PSA Peugeot Citroën and one with the ESI Group (Pamcrash).

New and Coming hpcLine Systems

Primergy P250 is a 2U rack server for high-performance and reliability. It is based on the latest Intel Xeon processor technology, max. 2.8 GHz, and quad-pumped 100 MHz front-side-bus. A node can have one or two processors, the main memory, with a hot-spare option, can have 256 up to 12 GB DDR RAM.

The other 1U rack system is described in the FSC/Intel announcement.

Actually FSC has the following compute nodes under development:

  • single Intel Pentium 4 (Northwood, > 3.06 GHz)
  • dual Intel Xeon (Prestonia, > 2.8 GHz)
  • dual AMD Athlon MP

hpcLine Interconnect Technologies

The standard interconnect is FastEthernet, 100 Mbit/s, and will migrate next year to GigabitEthernet. SCI realises 2D and 3D torus topology, faster SCI cards for PCI-X are planned. Myrinet2000 with a 128-way switch, here fast Myrinet cards for PCI-X are planned as well. With GigabitEthernet the switches are getting cheaper, cascaded solutions are possible. Fujitsu Japan evaluates Infiniband. The 10Gigabit solution is still very expensive and is evaluated in the Fujitsu Laboratories.

64-bit Activities

FSC actively participated in the Intel Leadership Programme for the introduction of the Itanium processor, with its CELSIUS Workstations and the PRIMERGY Server and an Application Support Center. Further on, it evaluates platforms for Intel Itanium 2 but also for the AMD Opteron. The clustering of 64-bit processors still opens a lot of questions, compiler (performance, reliability), are thick nodes needed, how much memory for the nodes and finally the price/performance ration - not only for the Linpack benchmark.

Future of hpcLine

On December 16, FSC and Intel will announce the Dual Xeon, 2.8 GHz, node with the E7501 chipset and DDR-SDRAM. In 2003, there will be a Single Pentium 4 node, 3.06 GHz with RDRAM/1066. Additionally, Intel Itanium 2- and AMD Opteron-based nodes are planned to be introduced. In 2003, the successor of the Pentium 4 processor with dual DDR333 memory and the successor of the Xeon processor with the E7501 chipset are expected. The introduction of new nodes follows the Intel and AMD architecture roadmap, based on price/performance considerations for technical and scientific applications.

http://www.hpcline.de

Uwe Harms

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