| Bristol 06 October 2004
ClearSpeed Technology has announced details of its first commercial microprocessor, the CSX600. In a presentation at the Fall Processor Forum in San Jose, California, one of the world's key semiconductor industry conferences, the company will be presenting performance data showing the new processor to be the highest performing product of its kind. The new chip, which delivers up to 50 GFLOPS for just 5 watts power consumption, is expected to become available by the end of Q1 2005.
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The CSX600 is designed as a co-processor for accelerating PC servers, workstations, clusters, blades and servers. Initial applications are expected to be in life sciences, financial modelling, geophysical computation, and scientific computing, military and aviation among others.
Commenting, Tom Beese, CEO of ClearSpeed, stated: "For scientists, researchers and engineers, what was previously impossible can now become possible. We listened to what our major OEM's and their customers were telling us. As a result, we have developed the CSX600 to deliver the highest level of performance and power efficiency available, inmost cases creating a minimum 10-fold increase in performance per watt. The impact of this will be to enable OEM's to deliver new levels of cost effective, high performance systems. We have been pleased by the early interest shown by systems companies and believe that the announcement of the CSX600 will provide further momentum in our business development ahead of availability of the chip."
ClearSpeed is working with customers and the open-source community to port and accelerate mathematically intensive codes such as complex FFT's, Monte Carlo algorithms, GROMACS molecular dynamics, and other math libraries such as BLAS. Software vendors can use ClearSpeed's C compiler and tool suite to significantly increase the computational capabilities of their own proprietary code base.
The CSX600 has the following features:
- 50 GFLOPS 32/64-bit, 25 GMACS 16-bit fixed point
- 96 Gbytes/s bandwidth to on-chip memory
- 11 Gbyte/s off-chip bandwidth
- 64-bit flat address space, 48-bit physical
- Gluelessly daisy-chain multiple devices for higher performance
- Programmed in C with a familiar, simple programming model
- Less than 5W typical
The CSX600 offers 64-bit, IEEE 754 double-precision floating point reaching 50 GFLOPS peak and 25 GFLOPS sustained (DGEMM) running at just 5 Watts. ClearSpeed has accomplished more than a doubling of the performance of its previous chip, the CS301, while adding significantly more I/O and memory bandwidth and still maintaining the same 10 GFLOPS per Watt power efficiency.
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