Tera machine accepted at SDSCSan Diego 20 Jul 99 Allen Snavely, computer scientist at SDSC, said, "Porting MPIRE to the MTA was simplicity itself. This effort really showed the elegance of Tera's programming model compared to that used on other parallel computers." According to SDSC's computer scientist Greg Johnson, "The MPIRE Raycaster scales extremely well on the MTA, and runs faster on eight MTA processors than on 64 processors of the distributed-memory supercomputers at SDSC." "The acceptance criteria included requirements that the Tera MTA system outperform both an SGI T90 vector supercomputer and an IBM SP massively parallel system," said Brian Koblenz, Tera's Vice President, Software. "By meeting these requirements we validated the MTA system's high performance and we also demonstrated excellent scalability," said Koblenz. "Outperforming an SGI T90 system with processors running at a clock speed of 440MHz with MTA processors running at 260MHz speaks volumes for Tera's innovative computer architecture," said Rottsolk. "These results further support industry analysts' belief that Tera's MTA represents potentially revolutionary breakthrough in general purpose computing."
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